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vishay siliconix SIP32431 document number: 66597 s11-0175-rev. b, 07-feb-11 www.vishay.com 1 1.0 a slew rate controlled load switch with reverse blocking in sc70-6, and tdfn4 1.2 mm x 1.6 mm features ? 1.5 v to 5.5 v input voltage range ? very low r ds(on) , typically 105 m ? at 5 v and 135 m ? at 3 v for tdfn4 1.2 mm x 1.6 mm package ? typical 147 m ? at 5 v and 178 m ? at 3 v for sc70-6 package ? slew rate controlled turn-on time: 100 s ? low quiescent current < 1 a ? low shutdown current < 1 a ? reverse blocking capability ? sc70-6 and tdfn4 1.2 mm x 1.6 mm packages ? compliant to rohs directive 2002/95/ec ? halogen-free according to iec 61249-2-21 definition applications ? cellular telephones ? digital still cameras ? personal digital assistants (pda) ? hot swap supplies ? notebook computers ? personal communication devices ? portable instruments description the SIP32431 is a slew rate controlled high side switch with reverse blocking capability. the switch is of a low on resistance p-channel mosfet that supports continuous current up to 1.0 a. the SIP32431 operates with an input voltage from 1.5 v to 5.5 v. the SIP32431 features low input logic level to interface with low control voltage from microprocessors. this device has a very low operating current, typically 50 pa. the SIP32431 is available in lead (pb)-free package options including 6 pin sc70-6, and 4 pin tdfn4 1.2 mm x 1.6 mm dfn4 packages. the operation temperature range is specified from - 40 c to + 85 c. the SIP32431 compact package options, operation voltage range, and low operating current make it a good fit for battery power applications. typical application circuit figure 1 - SIP32431 typical application circuit SIP32431 i n v out out v i n g n d g n d g n d o n /off o n /off c 1 f i n c 0.1 f out
www.vishay.com 2 document number: 66597 s11-0175-rev. b, 07-feb-11 vishay siliconix SIP32431 notes: x = lot code -ge3 denotes halogen-free and rohs compliant please use the SIP32431dr3-t1ge3 to replace SIP32431dr3-t1-e3 notes: a. device mounted with all leads and power pad soldered or welded to pc board. b. derate 4.5 mw/c above t a = 70 c. c. derate 5.9 mw/c above t a = 70 c, see pcb layout. stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating/conditions for extended periods may affect device reliability. ordering information temperature range package marking part number - 40 c to 85 c sc70-6 maxx SIP32431dr3-t1ge3 tdfn4 1.2 mm x 1.6 mm adx SIP32431dnp3-t1ge4 absolute maximum ratings parameter limit unit supply input voltage (v in ) - 0.3 to 6 v enable input voltage (v on/off ) - 0.3 to 6 output voltage (v out ) - 0.3 to v in + 0.3 maximum continuous switch current (i max ) sc70-6 package 1.2 a tdfn4 1.2 mm x 1.6 mm 1.4 maximum pulsed current (i dm ) v in (pulsed at 1 ms, 10 % duty cycle) v in ? 2.5 v 3 v in ? 2.5 v 1.6 esd rating (hbm) 4000 v junction temperature (t j ) - 40 to 125 c thermal resistance ( ? ja ) a 6 pin sc70-6 b 220 c/w 4 pin tdfn4 1.2 mm x 1.6 mm c 170 power dissipation (p d ) a 6 pin sc70-6 b 250 mw 4 pin tdfn4 1.2 mm x 1.6 mm c 324 recommended operating range parameter limit unit input voltage range (v in ) 1.5 to 5.5 v operating temperature range - 40 to 85 c
document number: 66597 s11-0175-rev. b, 07-feb-11 www.vishay.com 3 vishay siliconix SIP32431 notes: a. the algebriac convention whereby the most negative value is a minimum and the most positive a maximum. b. typical values are for design aid only, not guaranteed nor subject to production testing c. for v in outside this range consult typi cal on/off threshold curve. specifications parameter symbol test conditions unless specified v in = 5.0, t a = - 40 c to 85 c (typical values are at t a = 25 c) limits - 40 c to 85 c unit min. a typ. b max. a operating voltage c v in 1.5 - 5.5 v quiescent current i q on/off = active - 0.00005 1 a off supply current i q(off) on/off = inactive, out = open - - 1 off switch current i sd(off) on/off = inactive, out = 0 - - 1 reverse blocking current i rb v out = 5.5 v, v in = 0, v on/off = inactive - 0.13 1 on-resistance r ds(on) v in = 5 v, i l = 500 ma, t a = 25 c sc70-6 - 147 230 m ? tdfn4 - 105 v in = 4.2 v, i l = 500 ma, t a = 25 c sc70-6 - 155 250 tdfn4 - 110 v in = 3 v, i l = 500 ma, t a = 25 c sc70-6 - 178 290 tdfn4 - 135 v in = 1.8 v, i l = 500 ma, t a = 25 c sc70-6 - 275 480 tdfn4 - 230 v in = 1.5 v, i l = 500 ma, t a = 25 c sc70-6 - 395 520 tdfn4 - 350 on-resistance temp.-coefficient td rds - 2800 - ppm/c on/off input low voltage c v il v in ? 1.5 v to < 1.8 v --0.3 v v in ? 1.8 v to < 2.7 v --0.4 v in ? 2.7 v to ? 5.5 v --0.6 on/off input low voltage c v ih v in ? 1.5 v to < ? 2.7 v 1.3 -- v in ? 2.7 v to < 4.2 v 1.5 - - v in ? 4.2 v to ?? 5.5 v 1.8 - - on/off input leakage i sink v on/off = 5.5 v - - 1 a output turn-on delay time t d(on) v in = 5 v, r load = 10 ? , t a = 25 c -2040 s output turn-on rise time t (on) - 140 180 output turn-off delay time t d(off) -410
www.vishay.com 4 document number: 66597 s11-0175-rev. b, 07-feb-11 vishay siliconix SIP32431 pin configuration typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 2 - sc70-6 package out 1 top v ie w g n d 2 o n /off 3 n /c 6 g n d 5 i n 4 figure 3 - tdfn4 1.2 mm x 1.6 mm package 4 3 1 2 bottom v ie w o n /off i n out g n d g n d pin description pin number name function sc70-6 tdfn4 43 in this pin is the p-channel mosfet source con nection. bypass to ground through a 1 f capacitor. 2, 5 2 gnd ground connection 3 4 on/off enable input 1 1 out this pin is the p-channel mo sfet drain connection. bypass to ground through a 0.1 f capacitor. figure 4 - quiescent current vs. input voltage figure 6 - off switch current vs. input voltage 0 1.5 2.0 2.5 3.5 4.5 5.5 3.0 4.0 5.0 0.04 0.02 0.06 0.08 0.10 0.12 v in (v) i q - quiescent current (na) 0 1.5 2.0 2.5 3.5 5.0 6.0 3.0 4.0 5.5 4.5 150 50 250 200 100 300 350 v in (v) i sd(off) - off switch current (na) figure 5 - quiescent current vs. temperature figure 7 - off switch current vs. temperature 0.001 - 40 - 20 0 40 80 100 20 60 0.1 0.01 1 10 temperature (c) i q - quiescent current (na) v in = 5 v v in = 3 v 0 - 40 - 20 0 40 100 20 60 80 150 50 250 200 100 300 temperature (c) i sd(off) - off switch current (na) v in = 5 v
document number: 66597 s11-0175-rev. b, 07-feb-11 www.vishay.com 5 vishay siliconix SIP32431 typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 8 - r ds(on) vs. v in for sc70-6 package figure 10 - r ds(on) vs. input voltage figure 12 - reverse blocking current vs. v out 1.0 1.5 2.0 3.0 4.0 5.5 2.5 3.5 4.5 5.0 v in (v) r ds - on-resistance (m ) 50 100 150 200 250 300 350 400 450 500 550 for sc70-6 package i l = 1.2 a i l = 500 ma i l = 100 ma 50 1.5 2.0 2.5 3.5 5.5 3.0 4.0 4.5 5.0 250 100 450 350 150 550 200 400 300 500 v in (v) r ds - on-resistance (m ) i l = 1.2 a i l = 100 ma i l = 500 ma for tdfn4 package v out (v) i rb - reverse blocking current (na) 0.01 0.1 1 10 100 1000 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 v in = 0 v figure 9 - r ds(on) vs. temperature figure 11 - r ds(on) vs. temperature figure 13 - reverse blocking current vs. temperature - 40 - 20 0 40 80 100 20 60 temperature (c) r ds - on-resistance (m ) 120 130 140 150 160 170 180 190 200 210 220 v in = 5 v v in = 3 v i load = 500 ma for sc70-6 package 60 - 40 - 20 0 40 100 20 60 80 140 80 100 180 120 160 temperature (c) r ds - on-resistance (m ) v in = 5 v v in = 3 v i load = 500 ma for tdfn4 package - 40 - 20 0 40 100 20 60 80 temperature (c) i rb - reverse blocking current (na) 0 100 200 300 400 500 600 v out = 5.5 v v in = 0 v
www.vishay.com 6 document number: 66597 s11-0175-rev. b, 07-feb-11 vishay siliconix SIP32431 typical characteristics (internally regulated, 25 c, unless otherwise noted) typical waveforms figure 14 - on/off threshold vs. input voltage 0.4 1.5 2.0 2.5 3.5 6.0 3.0 4.0 5.0 4.5 5.5 1.2 0.6 0.8 1.6 1.0 1.4 v in (v) on/off threshold voltage (v) v ih v il figure 15 - switching (v in = 3 v) figure 17 - switching (v in = 5 v) figure 16 - turn-off (v in = 3 v) figure 18 - turn-off (v in = 5 v)
SIP32431 vishay siliconix document number: 66597 s11-0175-rev. b, 07-feb-11 www.vishay.com 7 block diagram pcb layout figure 19 - functional block diagram le v el shift t u rn-on sle w rate control g n d o n /off out i n re v erse blocking top bottom figure 20 - tdfn4 1.2 mm x 1.6 mm pcb layout
www.vishay.com 8 document number: 66597 s11-0175-rev. b, 07-feb-11 vishay siliconix SIP32431 detailed description the SIP32431 is a p-channel mosfet power switches designed for high-side slew rate controlled load-switching applications. once turned on, the slew-rate control circuitry is activated and current is ramped in a linear fashion until it reaches the level required for the output load condition. this is accomplished by first elevating the gate voltage of the mosfet up to its threshold voltage and then by linearly increasing the gate voltage unt il the mosfet becomes fully enhanced. at this point, the gate voltage is then quickly increased to the full input voltage to reduce r ds(on) of the mosfet switch and minimize any associated power losses. application information input capacitor while a bypass capacitor on the input is not required, a 1 f or larger capacitor for c in is recommended in almost all applications. the bypass capacitor should be placed as physically close as possible to the SIP32431 to be effective in minimizing transients on the input. ceramic capacitors are recommended over tantalum because of their ability to withstand input current surges from low impedance sources such as batteries in portable devices. output capacitor a 0.1 f capacitor or larger across v out and gnd is recommended to insure proper slew operation. c out may be increased without limit to a ccommodate any load transient condition with only minimal affect on the SIP32431 turn on slew rate time. there are no esr or capacitor type requirement. enable the on/off pin is compatible with both ttl and cmos logic voltage levels. protection against reve rse voltage condition the SIP32431 contains a body snatcher that normally connect the body to the source (in) when the device is enable. in case where the device is disabled but the v out is higher than the v in , the n-type body is switched to out, reverse bias the body diode to prevent the current from going back to the input. thermal considerations the SIP32431 is designed to ma intain a constant output load current. due to physical limitations of the layout and assembly of the device the maxi mum switch current is 1.0 a, as stated in the absolute maximum ratings table. however, another limiting characteristic for the safe operating load current is the thermal power dissipation of the package. to obtain the highest power dissipation (and a thermal resistance of 170 c/w) the power pad of the device should be connected to a heat sink on the printed circuit board. the maximum power dissipation in any application is dependant on the maximum junction temperature, t j(max) = 125 c, the junction-to-ambient thermal resistance for the tdfn4 1.2 mm x 1.6 mm package, ? j-a = 170 c/w, and the ambient temperature, t a , which may be formulaically expressed as: it then follows that, assuming an ambient temperature of 70 c, the maximum power dissipation will be limited to about 324 mw. so long as the load current is below the 1.0 a limit, the maximum continuous switch current beco mes a function two things: the package power dissipation and the r ds(on) at the ambient temperature. as an example let us calculate the worst case maximum load current at t a = 70 c. the worst case r ds(on) at 25 c occurs at an input voltage of 1.5 v and is equal to 520 m ? . the r ds(on) at 70 c can be extrapolated from this data using the following formula r ds(on) (at 70 c) = r ds(on) (at 25 c) x (1 + t c x ? t) where t c is 3300 ppm/c. continuing with the calculation we have r ds(on) (at 70 c) = 520 m ? x (1 + 0.0033 x (70 c - 25 c)) = 597 m ? the maximum current limit is then determined by which in case is 0.74 a. under the stated input voltage condition, if the 0.74 a current limit is exceeded the internal die temperature will rise and eventually, possibly damage the device. vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?66597 . 170 125 (max.) (max.) a a j a j t t t p - = - = - (on) (max.) (max.) ds load r p i <
document number: 65734 www.vishay.com revision: 08-feb-10 1 package information vishay siliconix tdfn4 1.2 x 1.6 case outline dim. millimeters inches min. nom. max. min. nom. max. a 0.50 0.55 0.60 0.020 0.022 0.024 a1 0.00 - 0.05 0.00 - 0.002 a3 0.15 ref 0.006 b 0.20 0.25 0.30 0.008 0.010 0.012 d 1.15 1.20 1.25 0.045 0.047 0.049 d2 0.81 0.86 0.91 0.032 0.034 0.036 e 0.50 bsc 0.020 e 1.55 1.60 1.65 0.061 0.063 0.065 e2 0.45 0.50 0.55 0.018 0.020 0.022 k 0.20 - - 0.008 - - l 0.30 0.35 0.40 0.012 0.014 0.016 ecn: c10-0043-rev. a, 08-feb-10 dwg: 5995 top view bottom view s ide view pin #1 id (optional) index area (d/2 x e/2) 21 4 3 3 4 12 d e a a1 b e l a3 e2 d2 k
notes: 1. dimensioning and tolerancing per ansi y14.5m-1994. 2. controlling dimensions: millimeters converted to inch dimensions are not necessarily exact. 3. dimension ?d? does not include mold flash, protrusion or gate burr. mold flash, protrusion or gate burr shall not exceed 0.15 mm (0.006 inch) per side. 4. the package top shall be smaller than the package bottom. dimension ?d? and ?e1? are determined at the outer most extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. c 0.15 (0.006) d e b d e1 n5 n4 n3 n1 n2 e e/2 b pin 1 e/1 e1/2 c 0.15 (0.006) c 0.10 (0.004) m a b c c 0.10 (0.004) a c seating plane a1 a2 sectiion a-a base metal (b) b1 c1 c a a detail a see detail a gage plane 0.15 (0.0059) h l u u1 package information vishay siliconix document number: 73201 19-nov-04 www.vishay.com 1 sc-70: 3/4/5/6-leads (pic only) pin lead count pin code 3 4 5 6 n1 ? ? 2 2 n2 2 2 3 3 n3 ? 3 4 4 n4 3 ? ? 5 n5 ? 4 5 6
package information vishay siliconix www.vishay.com 2 document number: 73201 19-nov-04 millimeters inches dim min nom max min nom max a 0.80 ? 1.10 0.031 ? 0.043 a1 0.00 ? 0.10 0.000 ? 0.004 a2 0.80 0.90 1.00 0.031 0.035 0.040 b 0.15 ? 0.30 0.006 ? 0.012 b1 0.15 0.20 0.25 0.006 0.008 0.010 c 0.08 ? 0.25 0.003 ? 0.010 c1 0.08 0.13 0.20 0.003 0.005 0.008 d 1.90 2.10 2.15 0.074 0.082 0.084 e 2.00 2.10 2.20 0.078 0.082 0.086 e 1 1.15 1.25 1.35 0.045 0.050 0.055 e 0.65 bsc 0.0255 bsc e 1 1.30 bsc 0.0512 bsc l 0.26 0.36 0.46 0.010 0.014 0.018 u 0 ? 8 0 ? 8 u1 4 10 4 10 ecn: s-42145?rev. a, 22-nov-04 dwg: 5941
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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